
2010 Microchip Technology Inc.
DS39774D-page 139
PIC18F85J11 FAMILY
TABLE 11-10: SUMMARY OF REGISTERS ASSOCIATED WITH PORTD
RD7/AD7/PSP7
RD7
0
O
DIG
LATD<7> data output.
1
I
ST
PORTD<7> data input.
AD7(2)
x
O
DIG
External memory interface, address/data bit 7 output.(1)
x
I
TTL
External memory interface, data bit 7 input.(1)
PSP7
x
O
DIG
PSP read output data (LATD<7>); takes priority over port data.
x
I
TTL
PSP write data input.
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
PORTD
RD7
RD6
RD5
RD4
RD3
RD2
RD1
RD0
LATD
LATD7
LATD6
LATD5
LATD4
LATD3
LATD2
LATD1
LATD0
TRISD
TRISD7
TRISD6
TRISD5
TRISD4TRISD3TRISD2TRISD1TRISD0
PORTG
RDPU
REPU
RJPU(1)
RG4
RG3
RG2
RG1
RG0
Legend: Shaded cells are not used by PORTD.
Note 1:
Unimplemented on 64-pin devices, read as ‘0’.
TABLE 11-9:
PORTD FUNCTIONS (CONTINUED)
Pin Name
Function
TRIS
Setting
I/O
Type
Description
Legend:
O = Output, I = Input, DIG = Digital Output, ST = Schmitt Buffer Input, TTL = TTL Buffer Input, x = Don’t care (TRIS bit
does not affect port direction or is overridden for this option).
Note 1:
External memory interface I/O takes priority over all other digital and PSP I/O.
2:
Available on 80-pin devices only.